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IEICE Transactions on Electronics
Vol. E93.C (2010) No. 12 P 1704-1707

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http://doi.org/10.1587/transele.E93.C.1704

Regular Section

A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-µm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8mW from 2.5-V power supply while the chip area is 380×500µm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.

Copyright © 2010 The Institute of Electronics, Information and Communication Engineers

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