A 0.357ps Resolution, 2.4GHz Time-to-Digital Converter with Phase-Interpolator and Time Amplifier

Abstract

In this paper, we propose a two-step TDC with phase-interpolator and time amplifier to satisfy high resolution at 2.4GHz input frequency by implementing delay time less than that of an inverter delay. The accuracy of phase-interpolator is improved for process variation using the resistor automatic-tuning circuit. The gain of time amplifier is improved using the delay time difference between two delay cells. It is implemented in a 0.13µm CMOS process with a die area of 0.68mm². And the power consumption is 14.4mW at a 1.2V supply voltage. The resolution and input frequency of the TDC are 0.357ps and 2.4GHz, respectively.