IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Circuits and Design Techniques for Advanced Large Scale Integration
On-Chip Resonant Supply Noise Canceller Utilizing Parasitic Capacitance of Sleep Blocks for Power Mode Switch
Jinmyoung KIMToru NAKURAHidehiro TAKATAKoichiro ISHIBASHIMakoto IKEDAKunihiro ASADA
著者情報
ジャーナル 認証あり

2011 年 E94.C 巻 4 号 p. 511-519

詳細
抄録
This paper presents an on-chip resonant supply noise canceller utilizing parasitic capacitance of sleep blocks. The test chip was fabricated in a 0.18µm CMOS process and measurement results show 43.3% and 12.5% supply noise reduction on the abrupt supply voltage switching and the abrupt wake-up of a sleep block, respectively. The proposed method requires 1.5% area overhead for four 100k-gate blocks, which is 7.1X noise reduction efficient comparing with the conventional decap for the same power supply noise, while achieves 47% improvement of settling time. These results make fast switching of power mode possible for dynamic voltage scaling and power gating.
著者関連情報
© 2011 The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top