IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
On-Chip In-Place Measurements of Vth and Signal/Substrate Response of Differential Pair Transistors
Yoji BANDOSatoshi TAKAYAToru OHKAWAToshiharu TAKARAMOTOToshio YAMADAMasaaki SOUDAShigetaka KUMASHIROTohru MOGAMIMakoto NAGATA
著者情報
ジャーナル 認証あり

2012 年 E95.C 巻 1 号 p. 137-145

詳細
抄録
In-place AC measurements of the signal gain and substrate sensitivity of differential pair transistors of an analog amplifier are combined with DC characterization of the threshold voltage (Vth) of the same transistors. An on-chip continuous time waveform monitoring technique enables in-place matrix measurements of differential pair transistors with a variety of channel sizes and geometry, allowing the wide coverage of experiments about the transistor-level physical layout dependency of substrate noise response. A prototype test structure uses a 90-nm CMOS technology and demonstrates the geometry-dependent variation of substrate sensitivity of transistors in operation.
著者関連情報
© 2012 The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top