A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors for a Laser Irradiation Failure Analysis

Abstract

A laser irradiation experiment for photocurrent induced failure investigations was described. In order to focus a laser beam on a desired transistor, novel test circuit structures using selectively metal-covered transistors were proposed. Photocurrent induced upset failures were successfully observed in fabricated CMOS SRAM test cells. Results were discussed with SPICE simulations.