抄録
We suggest a novel digitally-controlled SMPS using a high-resolution DPWM generator. In the proposed circuit, the duty ratio of the DPWM is determined by the voltage slope control of an internal capacitor using a pseudo relaxation-oscillation technique. This new control method has a simpler structure, and consumes less power compared to a conventional digitally-controlled SMPS. Therefore, the proposed circuit is able to operate at a high switching frequency (1MHz∼10MHz) obtained from a relatively low internal operating frequency (10MHz∼100MHz) with a small area. The maximum current of the core circuit is 2.7mA, and the total current of the entire circuit, including the output buffer driver, is 15mA at 10MHz switching frequency. The proposed circuit is designed to supply a maximum 1A with maximum DPWM duty ratio of 90%. The output voltage ripple is 7mV at 3.3V output voltage. To verify the operation of the proposed circuit, we performed a simulation with Dongbu Hitek BCD 0.35µm technology.
