IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Fundamentals and Applications of Advanced Semiconductor Devices
Tunable Threshold Voltage of Organic CMOS Inverter Circuits by Electron Trapping in Bilayer Gate Dielectrics
Toan Thanh DAOHideyuki MURATA
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2015 Volume E98.C Issue 5 Pages 422-428

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Abstract
We have demonstrated tunable n-channel fullerene and p-channel pentacene OFETs and CMOS inverter circuit based on a bilayer-dielectric structure of CYTOP (poly(perfluoroalkenyl vinyl ether)) electret and SiO2. For both OFET types, the Vth can be electrically tuned thanks to the charge-trapping at the interface of CYTOP and SiO2. The stability of the shifted Vth was investigated through monitoring a change in transistor current. The measured transistor current versus time after programming fitted very well with a stretched-exponential distribution with a long time constant up to 106 s. For organic CMOS inverter, after applying the program gate voltages for n-channel fullerene or p-channel pentacene elements, the voltage transfer characteristics were shifted toward more positive values, resulting in a modulation of the noise margin. We realized that at a program gate voltage of 60 V for p-channel OFET, the circuit switched at 4, 8 V, that is close to half supply voltage VDD, leading to the maximum electrical noise immunity of the inverter circuit.
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© 2015 The Institute of Electronics, Information and Communication Engineers
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