IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
A Low-Jitter Injection-Locked Clock Multiplier Using 97-μW Transformer-Based VCO with 18-kHz Flicker Noise Corner
Zheng SUNHanli LIUDingxin XUHongye HUANGBangan LIUZheng LIJian PANGTeruki SOMEYAAtsushi SHIRANEKenichi OKADA
ジャーナル 認証あり 早期公開

論文ID: 2020CDP0005


This paper presents a high jitter performance injection-locked clock multiplier (ILCM) using an ultra-low power (ULP) voltage-controlled oscillator (VCO) for IoT application in 65-nm CMOS. The proposed transformer-based VCO achieves low flicker noise corner and sub-100 μW power consumption. Double cross-coupled NMOS transistors sharing the same current provide high transconductance. The network using high-Q factor transformer (TF) provides a large tank impedance to minimize the current requirement. Thanks to the low current bias with a small conduction angle in the ULPVCO design, the proposed TF-based VCO's flicker noise can be suppressed, and a good PN can be achieved in flicker region (1/ƒ3) with sub-100 μW power consumption. Thus, a high figure-of-merit (FoM) can be obtained at both 100 kHz and 1MHz without additional inductor. The proposed VCO achieves phase noise of -94.5/-115.3 dBc/Hz at 100 kHz/1MHz frequency offset with a 97 μW power consumption, which corresponds to a -193/-194 dBc/Hz VCO FoM at 2.62 GHz oscillation frequency. The measurement results show that the 1/ƒ3 corner is below60 kHz over the tuning range from 2.57 GHz to 3.40 GHz. Thanks to the proposed low power VCO, the total ILCM achieves 78 fs RMS jitter while using a high reference clock. A 960 fs RMS jitter can be achieved with a 40MHz common reference and 107 μW corresponding power.

© 2021 The Institute of Electronics, Information and Communication Engineers
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