IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524

この記事には本公開記事があります。本公開記事を参照してください。
引用する場合も本公開記事を引用してください。

Analysis of Efficiency-Limiting Factors Resulting from Transistor Current Source on Class-F and Inverse Class-F Power Amplifiers
Hiroshi YAMAMOTOKen KIKUCHIValeria VADALÀGianni BOSIAntonio RAFFOGiorgio VANNINI
著者情報
ジャーナル フリー 早期公開

論文ID: 2022MMI0003

この記事には本公開記事があります。
詳細
抄録

This paper describes the efficiency-limiting factors resulting from transistor current source in the case of class-F and inverse class-F (F-1) operations under saturated region. We investigated the influence of knee voltage and gate-voltage clipping behaviors on drain efficiency as limiting factors for the current source. Numerical analysis using a simplified transistor model was carried out. As a result, we have demonstrated that the limiting factor for class-F-1 operation is the gate-diode conduction rather than knee voltage. On the other hand, class-F PA is restricted by the knee voltage effects. Furthermore, nonlinear measurements carried out on a GaN HEMT validate our analytical results.

著者関連情報
© 2022 The Institute of Electronics, Information and Communication Engineers
feedback
Top