Comparative Analysis of Interleaving Schemes in High-Speed Digital-to-Analog Converters

Abstract

The growing interest in interleaved digital-to-analog converters (DACs) has led to numerous developments and designs, while extending interleaving factors poses several challenges. This research presents a hybrid segment architecture for expanding the number of channels in time-interleaved (TI)-DACs, addressing critical limitations of existing architectures. Our architecture incorporates a pre-filter, a single-stage analog multiplexer, and an output combiner, enabling improved performance and compromising bandwidth and usable output swing. In addition, a comprehensive system-level analysis is conducted in this paper to evaluate the performance of different TI-DAC architectures. The simulation result highlights the effectiveness of the hybrid architecture in achieving superior SNR with sufficient bandwidth and overcoming the challenges of channel number extension.