The Optimum Design Methodology of Low-Phase-Noise LC-VCO Using Multiple-Divide Technique

抄録

The multiple-divide technique, using the multi-ratio frequency divider, has a possibility to improve FoM of VCO. This paper proposes a design optimization of LC-VCO using the multiple-divide technique. In the simulated results using 90-nm CMOS model parameters, the optimum frequency range, achieving better than -187.0dBc/Hz of FoM, can be extended from 6.5-12.5GHz to 1.5-12.5GHz. The proposed multiple-divide technique can provide a lower phase-noise, lower power consumption, smaller layout area of LC-VCO.