IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on Analog Circuit Techniques and Related Topics
Evaluation of a Multi-Line De-Embedding Technique up to 110 GHz for Millimeter-Wave CMOS Circuit Design
Ning LIKota MATSUSHITANaoki TAKAYAMAShogo ITOKenichi OKADAAkira MATSUZAWA
著者情報
ジャーナル 認証あり

2010 年 E93.A 巻 2 号 p. 431-439

詳細
抄録
An L-2L through-line de-embedding method has been verified up to millimeter wave frequency. The parasitics of the pad can be modeled from the L-2L through-line. Measurement results of the transmission lines and transistors can be de-embedded by subtracting the parasitic matrix of the pad. Therefore, the de-embedding patterns, which is used for modeling active and passive devices, decrease greatly and the chip area also decreases. A one-stage amplifier is firstly implemented for helping verifying the de-embedding results. After that a four-stage 60GHz amplifier has been fabricated in CMOS 65nm process. Experimental results show that the four-stage amplifier realizes an input matching better than -10.5dB and an output matching better than -13dB at 61GHz. A small signal power gain of 16.4dB and a 1dB output compression point of 4.6dBm are obtained with a DC current consumption of 128mA from a 1.2V power supply. The chip size is 1.5mm × 0.85mm.
著者関連情報
© 2010 The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top