IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on Information Theory and Its Applications
Multilane Hashing Mode Suitable for Parallel Processing
Hidenori KUWAKADOShoichi HIROSE
著者情報
ジャーナル 認証あり

2013 年 E96.A 巻 12 号 p. 2434-2442

詳細
抄録
A hash function is an important primitive for cryptographic protocols. Since algorithms of well-known hash functions are almost serial, it seems difficult to take full advantage of recent multi-core processors. This paper proposes a multilane hashing (MLH) mode that achieves both of high parallelism and high security. The MLH mode is designed in such a way that the processing speed is almost linear in the number of processors. Since the MLH mode exploits an existing hash function as a black box, it is applicable to any hash function. The bound on the indifferentiability of the MLH mode from a random oracle is beyond the birthday bound on the output length of an underlying primitive.
著者関連情報
© 2013 The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top