IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on Mathematical Systems Science and its Applications
Refinement and Verification of Sequence Diagrams Using the Process Algebra CSP
Tomohiro KAIZUYoshinao ISOBEMasato SUZUKI
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Volume E96.A (2013) Issue 2 Pages 495-504

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Abstract

Sequence diagrams are often used in the modular design of softwares. In this paper, we propose a method to verify correctness of sequence diagrams. With this method, using the process algebra CSP, concurrent systems can be synthesized from a number of sequence diagrams. We define new CSP operators for the synthesis of sequence diagrams. We also report on a tool implementing our synthesis method and demonstrate how the tool analyzes sequence diagrams.

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© 2013 The Institute of Electronics, Information and Communication Engineers
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