This paper presents a high-throughput sliding block Viterbi decoder for IEEE 802.11ac systems. A 64-state bidirectional sliding block Viterbi method is proposed to meet the speed requirement of the system. The decoder throughput goes up to 640Mbps, which can be further increased by adding the block parallelism. Moreover, a modified add-compare-select (ACS) unit is designed to enhance the working frequency. The modified ACS unit obtains nearly 26% speed-up, compared to the conventional ACS unit. However, the area overhead and power dissipation are almost the same. The decoder is designed in a SMIC 0.13µm technology, and it occupies 1.96mm2 core area and 105mW power consumption with an energy efficiency of 0.1641nJ/bit with a 1.2V voltage supply.
In this paper, we propose a novel method for the design of CSD (Canonic Signed Digit) coefficient FIR (Finite Impulse Response) filters based on ACO (Ant Colony Optimization). This design problem is formulated as a combinatorial optimization problem and requires high computation time to obtain the optimal solution. Therefore, we propose an ACO approach for the design of CSD coefficient FIR filters. ACO is one of the promising approaches and appropriate for solving a combinatorial optimization problem in reasonable computation time. Several design examples showed the effectiveness of our method.
This paper expands Bartlett's bisection theorem. The theory of modal S-parameters and their circuit representation is constructed from a group-theoretic perspective. Criteria for the division of a circuit at a fixed node whose state is distinguished by the irreducible representation of its stabilizer subgroup are obtained, after being inductively introduced using simple circuits as examples. Because these criteria use only circuit symmetry and do not require human judgment, the distinction is reliable and implementable in a computer. With this knowledge, the entire circuit can be characterized by a finite combination of smaller circuits. Reducing the complexity of symmetric circuits contributes to improved insights into their characterization, and to savings of time and effort in calculations when applied to large-scale circuits. A three-phase filter and a branch-line coupler are analyzed as application examples of circuit and electromagnetic field analysis, respectively.
Many-core architecture is becoming an attractive design choice in high-end embedded systems design. There are, however, many important design issues, and load balancing is one of them. In this work, we take the approach of diffusive load balancing which enables autonomic load distribution in many-core systems. We improve the existing schemes by adding the concept of simulated annealing for more effective load distribution. The modified scheme is also capable of managing a situation of non-uniform granularity of task loading, which the existing ones cannot. In addition, the suggested scheme is extended to be able to handle dependencies existing in task graphs where tasks have communications between each other. As experiments, we tried various existing schemes as well as the proposed one to map synthetic applications and real world applications on a many-core architecture with 21 cores and 4 memory tiles. For the applications without communications, the experiments show that the proposed scheme gives the best results in terms of peak load and standard deviation. For real applications such as mp3 decoder and h.263 encoder which have communications between tasks, we show the effectiveness of our communication-aware scheme for load balancing in terms of throughput.
The increasing demand on scalability and reusability of system-on-chip design as well as the decoupling between computation and communication has motivated the growth of the Network-on-Chip (NoC) paradigm in the last decade. In NoC-based systems, the computational resources (i.e. IPs) communicate with each other using a network infrastructure. Many works have focused on the development of NoC architectures and routing mechanisms, while the interfacing between network and associated IPs also needs to be considered. In this paper, we present a novel efficient AXI (AMBA eXtensible Interface) compliant network adapter for NoC architectures, which is named an AXI-NoC adapter. The proposed network adapter achieves high communication throughput of 20.8Gbits/s and consumes 4.14mW at the operating frequency of 650MHz. It has a low area footprint (952 gates, approximate to 2,793µm2 with CMOS 45nm technology) thanks to its effective hybrid micro-architectures and with zero latency thanks to the proposed mux-selection method.
For some applications, it has been known that stochastic computing (SC) has many potential advantages compared with conventional computation on binary radix encoding. Thus, there has been proposed many design methodologies to realize SCs. Recently, a general design method to realize SC operations by designing Boolean circuits (functions) has been proposed. As a central part of the method, we need to design a logic circuit such that its output becomes 1 with a certain desired probability with respect to random inputs. Also, to realize an SC arithmetic operation with a constant value, in some situations we need to prepare a random bit-stream that becomes 1 with a desired probability from a set of predetermined physical random sources. We call such a bit-stream as a stochastic number (SN). We can utilize the above-mentioned previous method to prepare stochastic numbers by designing Boolean circuits. The method assumes all the random sources become 1 with the same probability 1/2. In this paper, we investigate a different framework where we can prepare different probabilities of each stochastic number in the physical random sources. Then, this paper presents the necessary and sufficient condition of given random inputs in order to produce a stochastic number with a given specified precision. Based on the condition, we can propose a method to generate a stochastic number by using the minimum number of random inputs. Indeed our method uses much less number of inputs than the previous method, and our preliminary experiment shows that the generated circuits by our method also tend to be smaller than the ones by the previous method.
A group signature allows any group member to anonymously sign a message. One of the important issues is an efficient membership revocation. The scheme proposed by Libert et al. has achieved O(1) signature and membership certificate size, O(1) signing and verification times, and O(log N) public key size, where N is the total number of members. However the Revocation List (RL) data is large, due to O(R) signatures in RL, where R is the number of revoked members. The scheme proposed by Nakanishi et al. achieved a compact RL of O(R/T) signatures for any integer T. However, this scheme increases membership certificate size by O(T). In this paper, we extend the scheme proposed by Libert et al., by reducing the RL size to O(R/T) using a vector commitment to compress the revocation entries, while O(1) membership certificate size remains.
We consider fixed-to-variable length coding with a regular cost function by allowing the error probability up to any constantε. We first derive finite-length upper and lower bounds on the average codeword cost, which are used to derive general formulas of two kinds of minimum achievable rates. For a fixed-to-variable length code, we call the set of source sequences that can be decoded without error the dominant set of source sequences. For any two regular cost functions, it is revealed that the dominant set of source sequences for a code attaining the minimum achievable rate under a cost function is also the dominant set for a code attaining the minimum achievable rate under the other cost function. We also give general formulas of the second-order minimum achievable rates.
This paper proposes a fountain coding system which has lower decoding erasure rate and lower space complexity of the decoding algorithm than the Raptor coding systems. A main idea of the proposed fountain code is employing shift and exclusive OR to generate the output packets. This technique is known as the zigzag decodable code, which is efficiently decoded by the zigzag decoder. In other words, we propose a fountain code based on the zigzag decodable code in this paper. Moreover, we analyze the overhead, decoding erasure rate, decoding complexity, and asymptotic overhead of the proposed fountain code. As a result, we show that the proposed fountain code outperforms the Raptor codes in terms of the overhead and decoding erasure rate. Simulation results show that the proposed fountain coding system outperforms Raptor coding system in terms of the overhead and the space complexity of decoding.
Hybrid vehicles (HVs) and electric vehicles (EVs) have become widespread. These vehicles incorporate a large number of electronic devices, which requires the use of a high-voltage (200 V) battery. Power electronics devices driven by the 200 V battery is expected to increase in the future. As such, we herein propose a power line communication (PLC) method that uses a high-voltage power line. In the present paper, we first clarify the transmission channel through modeling of an equivalent circuit and channel measurement. We then conduct noise measurements and determine the noise characteristics of the proposed PLC. Finally, we evaluate the bit error rate performance through computer simulations based on the measured transmission channel and noise.
Nonnegative matrix factorization (NMF) is one of the most popular machine learning tools for speech enhancement. The supervised NMF-based speech enhancement is accomplished by updating iteratively with the prior knowledge of the clean speech and noise spectra bases. However, in many real-world scenarios, it is not always possible for conducting any prior training. The traditional semi-supervised NMF (SNMF) version overcomes this shortcoming while the performance degrades. In this letter, without any prior knowledge of the speech and noise, we present an improved semi-supervised NMF-based speech enhancement algorithm combining techniques of NMF and robust principal component analysis (RPCA). In this approach, fixed speech bases are obtained from the training samples chosen from public dateset offline. The noise samples used for noise bases training, instead of characterizing a priori as usual, can be obtained via RPCA algorithm on the fly. This letter also conducts a study on the assumption whether the time length of the estimated noise samples may have an effect on the performance of the algorithm. Three metrics, including PESQ, SDR and SNR are applied to evaluate the performance of the algorithms by making experiments on TIMIT with 20 noise types at various signal-to-noise ratio levels. Extensive experimental results demonstrate the superiority of the proposed algorithm over the competing speech enhancement algorithm.
Improved fractional variable tap-length adaptive algorithm that contains Sigmoid limited fluctuation function and adaptive variable step-size of tap-length based on fragment-full error is presented. The proposed algorithm can solve many deficiencies in previous algorithm, comprising small convergence rate and weak anti-interference ability. The parameters are able to modify reasonably on the basis of different situations. The Sigmoid constrained function can decrease the fluctuant amplitude of the instantaneous errors effectively and improves the ability of anti-noise interference. Simulations demonstrate that the proposed algorithm equips better performance.
This letter considers a backscatter assisted wireless powered communication network (BAWPCN) with non-orthogonal multiple access (NOMA). This model consists of a hybrid access point (HAP) and multiple users which can work in either backscatter or harvest-then-transmit (HTT) protocol. To fully exploit time for information transmission, the users working in the backscatter protocol are scheduled to reflect modulated signals during the first phase of the HTT protocol which is dedicated for energy transfer. During the second phase, all users working in the HTT protocol transmit information to the HAP simultaneously since NOMA is adopted. Considering both short-term and long-term optimization problems to maximize the system throughput, the optimal resource allocation policies are obtained. Simulation results show that the proposed model can significantly improve the system performance.
This letter presents a successive partial interference cancellation (SPIC) scheme for full-duplex (FD) and multiple-input multiple-output (MIMO) relaying system. The proposed scheme coordinates the cancellation for the self-interference and inter-stream interference. The objective for the coordination focuses on simultaneously minimizing the two interferences. Simulation results under the measured data show that the system with the proposed scheme can achieve a significant performance gain compared to the conventional FD and half-duplex (HD) systems.
Midori128 is a lightweight block cipher proposed at ASIACRYPT 2015 to achieve low energy consumption per bit. Currently, the best published impossible differential attack on Midori128 covers 10 rounds without the pre-whitening key. By exploiting the special structure of the S-boxes and the binary linear transformation layer in Midori128, we present impossible differential distinguishers that cover 7 full rounds including the mix column operations. Then, we exploit four of these distinguishers to launch multiple impossible differential attack against 11 rounds of the cipher with the pre-whitening and post-whitening keys.
This letter studies the price-based power control algorithm for the spectrum sharing cognitive radio networks. The primary user (PU) profits from the secondary users (SUs) by pricing the interference power made by them. The SUs cooperate with each other to maximize their sum revenue with the signal-to-interference plus noise ratio (SINR) balancing condition. The interaction between the PU and the SUs is modeled as a Stackelberg game. Closed-form expressions of the optimal price for the PU and power allocation for the SUs are given. Simulation results show the proposed algorithm improves the revenue of both the PU and fairness of the SUs compared with the uniform pricing algorithm.
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