Leakage Power Aware Scheduling in High-Level Synthesis

Abstract

In this paper, we address the problem of scheduling operations into control steps with a dual threshold voltage (dual-V_th) technique, under timing and resource constraints. We present a two-stage algorithm for leakage power optimization. In the threshold voltage (V_th) assignment stage, the proposed algorithm first initializes all the operations to high-V_th, and then it iteratively shortens the critical path delay by reassigning the set of operations covering all the critical paths to low-V_th until the timing constraint is met. In the scheduling stage, a modified force-directed scheduling is implemented to schedule operations and to adjust threshold voltage assignments with a consideration of the resource constraints. To eliminate the potential resource constraint violations, the operations' threshold voltage adjustment problem is formulated as a “weighted interval scheduling” problem. The experimental results show that our proposed method performs better in both running time and leakage power reduction compared with MWIS [3].