IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on VLSI Design and CAD Algorithms
Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm
Kazuhito ITOHiroki HAYASHI
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2016 Volume E99.A Issue 12 Pages 2507-2510

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Abstract

In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.

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© 2016 The Institute of Electronics, Information and Communication Engineers
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