トライボロジスト
Online ISSN : 2189-9967
Print ISSN : 0915-1168
ISSN-L : 0915-1168
解説
半導体基板製造における超精密平坦加工技術の動向
― 研磨シミュレーションの開発―
吉冨 健一郎
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ジャーナル 認証あり

2019 年 64 巻 12 号 p. 712-717

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抄録

The surface of a semiconductor substrate is flattened with high accuracy by a planarization polishing technique. To obtain the high flatness for a large sized wafer, various polishing simulations have been developed. The first part of this report describes the polishing simulation theory and some applications for a single side polishing. The simulation used for the oscillation polishing with a small tool calculates the change of the wafer profile and optimizes the oscillation speed distribution to obtain the flatness of 0.1μm. The latter part of this report introduces a simulation for a double side polishing, the idea of calculating the pressure distribution and a simulation example.

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© 2019 一般社団法人 日本トライボロジー学会
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