Silicon-Photonics-Embedded Interposers as Co-Packaged Optics Platform

Released on J-STAGE: April 25, 2022 | Volume 15 Pages E21-012-1-E21-012-13

Koichi Takemura, Daisuke Ohshima, Akihiro Noriki, Daisuke Okamoto, Akio Ukita, Jun Ushida, Masatoshi Tokushima, Takanori Shimizu, Ichiro Ogura, Daisuke Shimura, Tsuyoshi Aoki, Takeru Amano, Takahiro Nakamura

Bonding Strength of Cu Sinter Die-Bonding Paste on Ni, Cu, Ag, and Au Surfaces under Pressureless Bonding Process

Released on J-STAGE: October 01, 2020 | Volume 13 Pages E19-017-1-E19-017-11

Dai Ishikawa, Bao Ngoc An, Matthias Mail, Helge Wurst, Benjamin Leyrer, Thomas Blank, Marc Weber, Suguru Ueda, Hideo Nakako, Yuki Kawana

A Design Method of Compact Lumped-Element Matching Circuits for Diplexers Using SAW Filters

Released on J-STAGE: November 29, 2018 | Volume 11 Pages E17-015-1-E17-015-8

Shinpei Oshima, Tomonori Oshima, Takuto Numao, Koji Wada

Low Warpage Coreless Substrate for IC Packages

Released on J-STAGE: May 13, 2013 | Volume 5 Pages 55-62

Mamoru Kurashina, Daisuke Mizutani, Masateru Koide, Manabu Watanabe, Kenji Fukuzono, Nobutaka Itoh, Hitoshi Suzuki

Heat Dissipation Measurement of Electronic Component on PCB by Means of External Heater and Heat Flux Sensor

Released on J-STAGE: November 30, 2021 | Volume 14 Pages E21-003-1-E21-003-10

Zidi Li, Joao Vitor Thomsen Silveira, Kazuyoshi Fushinobu, Hiroki Nagamizo, Ryuta Yasui, Takuya Shinoda