IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
The sprint process of Al interconnects with low-temperature PVD via filling
Takashi YodaHirokazu EzawaKaori TsutsumiMakoto Honda
Author information
JOURNALS FREE ACCESS

2004 Volume 1 Issue 9 Pages 263-268

Details
Abstract

For multilevel interconnects of LSI memory devices, the Al sprint process using the two-step cold/hot Al PVD at less than 400°C is a realistic solution to reduction of the process cost. The process windows of via filling were investigated for via holes of 0.22µm to 0.16µm. Based on the assumption that Al diffusion decides filling capability, temperature and thickness of the cold Al liner PVD and deposition time of the hot Al PVD were optimized, resulting in complete filling of 0.16µm via holes. We have confirmed the viability of the Al PVD via filling for less than 110nm device generations.

Information related to the author
© 2004 by The Institute of Electronics, Information and Communication Engineers
Previous article
feedback
Top