A low latency semi-systolic multiplier over GF(2^m)

Abstract

A finite field multiplier is commonly used in implementations of cryptosystems and error correcting codes. In this paper, we present a low latency semi-systolic multiplier over GF(2^m). We propose a finite field multiplication algorithm to reduce latency based on parallel computation. The proposed multiplier saves at least 31% time complexity as compared to the corresponding existing structures.