IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
A high resolution and high linearity 45nm CMOS fully digital voltage sensor for low power applications
Myunghwan RyuYoungmin Kim
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2013 Volume 10 Issue 13 Pages 20130400

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Abstract

This paper proposes a design of voltage sensor with new controllable delay element (CDE) having high linearity and high resolution. The proposed CDE uses power supply node to measure the voltage value. However, the delay increases exponentially at low voltage level. In this paper we add a PMOS header in parallel with the conventional CDE to compensate the delay degradation at lower voltage. We develop a 16-levels fully digital voltage sensor with a voltage range of 0.8 ∼ 1.1V and 20mV resolution by using of the proposed delay elements. The proposed circuit is designed and simulated in a 45nm CMOS process. The simulation results show the feasibility of the high resolution and high linearity at low voltage by using of the proposed delay elements.

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© 2013 by The Institute of Electronics, Information and Communication Engineers
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