抄録
The inductive degenerated Common Source (CS) Low Noise Amplifier (LNA) is one of the widely used topology for realizing narrow band Radio Frequency (RF) CMOS LNAs. Though this scheme has been in use for a long time, realizing an optimum design still remains a challenging task. The present paper reports a simple and direct design space exploration procedure for the inductive degenerated CS LNA. The procedure first involves the use of a circuit simulator (Cadence Spectre) to generate a Look Up Table of small signal parameters. These are then used in a numerical simulator (MATLAB) to explore the entire design space by computing the various performance parameters and arrive at the final optimal designs. The predicted performances of the optimum designs were then verified using UMC 180nm CMOS process parameters in Cadence Spectre. Completing all the computations on a typical low end desktop system within about an hour, the results presented indicate that one can search a design space of nearly fourteen million design candidates and arrive at an optimum of one’s choice.
