Reduction of signal reflection in high-frequency three-dimensional (3D) integration circuits

Abstract

The through silicon via (TSV) technology provides a promising option to realize three dimensional (3D) gigscale systems with high performance. As the fundamental elements in this system, Redistribution Layers (RDLs), TSVs, and bumps, which constitute a TSV channel together, transmit high speed signals. Consequently the impedance mismatch among these elements causes signal reflection along the channel that need to be investigated. Chebyshev Multisection Matching Transformers are proposed to reduce the signal reflection of the TSV channel when operating frequency up to 20GHz, by utilizing of which S₁₁ and S₂₁ has been improved of 150% and 73.3%, respectively.