Contact resistivity reduction for PtSi/Si(100) by dopant segregation process

Abstract

Contact resistivity reduction at PtSi/Si(100) interface by dopant segregation (DS) process was investigated by the cross-bridge Kelvin resistor (CBKR) method for the first time. After the 60 nm-thick PtSi was formed at 700^oC/1min in N₂ ambient, ion implantation (PH₃ or BF₃, 1×10¹⁵cm⁻², 15 keV) was carried out followed by the drive-in anneal at 800^oC/1min as a DS process. The Schottky barrier height (SBH) for electron and hole obtained from the C-V characteristics of PtSi/Si(100) diodes were 0.19eV and 0.23eV, respectively. The contact resistivity of 1.7×10⁻⁷Ωcm² for PtSi/p⁺-Si(100) and 1.8×10⁻⁶Ωcm² for n⁺-Si(100) were achieved even for the minimum contact area of 2.2μm² and 33μm², respectively.