IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Area-efficient analog peripheral circuit techniques for Solid State Drive with NAND flash memories
Youngil KimSangsun Lee
Author information
JOURNAL FREE ACCESS

2013 Volume 10 Issue 5 Pages 20130127

Details
Abstract
This letter proposes area-efficient peripheral circuit techniques for 3D Solid State Drive (SSD) with NAND flash memories. We reduced charge pump stage using external high voltage of 12V and 5V, and improve target voltage accuracy using a cascode error amplifier of high voltage linear regulator. Also, we proposed fast transient response active mode VDC using NMOS pass element with external high voltage of 5V.
Content from these authors
© 2013 by The Institute of Electronics, Information and Communication Engineers
Previous article
feedback
Top