抄録
This letter proposes area-efficient peripheral circuit techniques for 3D Solid State Drive (SSD) with NAND flash memories. We reduced charge pump stage using external high voltage of 12V and 5V, and improve target voltage accuracy using a cascode error amplifier of high voltage linear regulator. Also, we proposed fast transient response active mode VDC using NMOS pass element with external high voltage of 5V.
