IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
VLSI design of a reconfigurable S-box based on memory sharing method
Weiwei ShanXiao ZhangXingyuan FuPeng Cao
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2014 年 11 巻 1 号 p. 20130872

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抄録
S-box is a core component of many block cipher algorithms. A reconfigurable S-box based on look-up table (LUT) with memory-sharing is proposed in this paper. It uses a sharing memory to support different S-box operation modes (4 × 4, 6 × 4, and 8 × 8) for most of the block cipher algorithms as well as reduce memory size. It also supports high-speed pipeline structure of DES and Serpent. This new type of S-box is applied in a reconfigurable cryptographic coprocessor under 0.18μm CMOS process. It is also used in a DES circuit with 16 pipeline stages. Synthesis results show that it works at 100MHz frequency with flexibility of different modes and a reduced area compared to non-memory-sharing LUT method with equivalent sizes of different S-boxes.
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© 2014 by The Institute of Electronics, Information and Communication Engineers
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