IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Scalable design of microprogrammed digital FIR filter for sensor processing subsystem
Mohammed S. BenSalehSyed Manzoor QasimAbdullah A. AlJuffriAbdulfattah M. Obeid
Author information
JOURNAL FREE ACCESS

2014 Volume 11 Issue 14 Pages 20140474

Details
Abstract

In this letter, a novel scalable and modular design of direct form sequential finite impulse response (FIR) filter using microprogrammed control unit is proposed that can be efficiently realized in field programmable gate array (FPGA) or application specific integrated circuit (ASIC). The proposed design is suitable for sensor processing subsystem used in wireless sensor network (WSN) nodes. This is demonstrated by evaluating a sample 4-tap FIR filter on various FPGA platforms and ASIC technologies. The evaluation result shows good area/power efficiency and flexibility by using microprogrammed architecture for such applications.

Content from these authors
© 2014 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top