A fast-transient on-chip LDO with advanced dynamic biasing circuit

Abstract

A low-power fast-transient on-chip low-dropout regulator (LDO) using advanced dynamic biasing circuit is presented in this paper. The proposed advanced dynamic biasing circuit is composed of an advanced dynamic biasing current generator and a related slew rate enhancement circuit. The advanced dynamic biasing current generator boosts the bias current of the LDO momentarily during the transient state through coupling the output voltage spike. In addition, the slew rate enhancement circuit, which utilizes the dynamic biasing current, suppresses the output voltage spike with an automatic on/off feature. From the Hspice simulation results, the output voltage is regulated at 0.8 V from a 1-V supply voltage. The output voltage recovers within 1.4 µs at a voltage spike less than 80 mV for load current switching from 50 µA to 100 mA with 300-ns rise and fall time.