抄録
With more and more cores integrated in a single chip, three-dimensional network-on-chip (3D NoC) based on through-silicon-via (TSV) is a good way to deal with the problem of large network diameter. But if the number of cores increase to several hundreds or even thousands, the large number of TSV cannot be neglected any more due to the low yield and high overhead of TSV. Therefore, it is necessary to obtain a balance point between cost and performance. In this letter, we propose H-cluster that applies a hybrid vertical interconnect scheme. It minimizes the number of TSV by sharing vertical links through vertical routers. The simulation results shows that the H-cluster can improve the yield of many-cores chip and provide a better performance.
