Nonlinear inter-stage gain calibration for pipelined ADCs employing double dithering modes

抄録

A digital calibration scheme simultaneously correcting both linear and nonlinear errors of inter-stage amplifiers in pipelined ADCs is proposed. Two modes of dithering are employed for the linear gain measurement, and the difference between their results is used to indicate the nonlinear error. The additional analog complexity introduced by the proposed technique is no more than that in a classical signal dependent dithering scheme. Behavioral simulation shows that the proposed calibration scheme is able to correct both linear and nonlinear errors within 6 × 10⁷ conversion steps, and improve SNDR from 47 dB to about 80 dB in a prototype 14-bit pipelined ADC having 5% full-scale gain compression in the 1^st stage’s residue amplifier.