Abstract
The paper presents an evolvable system for intrinsic hardware evolution based on look-up-table (LUT) manipulation. We also introduce dynamic routing using multiplexer to improve the flexibility of the system. The proposed approach is implemented on Xilinx ML403 Evaluation Platform, and an evolution of 3-bit multiplier is employed for verification. The experimental results show that more than three orders of evolution speed enhancement over JBits and one order of evolution speed enhancement over bitstream reverse engineering (BRE) based methods is achieved.