IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
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Settling time optimization technique for binary-weighted digital-to-analog converter
Hyo-jong Kim, Donghwan Seo, Byung-geun Lee
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Keywords: digital to analog converter, analog to digital converter, switched-capacitor circuit, settling time, successive approximation
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2014 Volume 11 Issue 6 Pages 20140132

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Abstract
Settling behavior of the binary-weighted switched-capacitor digital-to-analog converter output is analyzed and a design method for fast settling is presented. A calibration circuit that effectively reduces settling time beyond the process limit is also proposed and verified with various simulations.
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© 2014 by The Institute of Electronics, Information and Communication Engineers
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