抄録
3D ICs is a solution for multi-core processors, with critical challenge of internal thermal problem. A new solution for this problem is interlayer cooling system, which expands the floorplan design space of micro-processors in 3D ICs. This work proposes a floorplanner for multi-core processor in 3D ICs with interlayer cooling system, integrated with greedy and particle swarm optimization method. The results show that the maximal temperature and temperature gradient reduced by 10.3°C and 9.2°C respectively, compared with the baseline design in 3 active device layers.
