2015 Volume 12 Issue 7 Pages 20150065
Taking advantage of Three Dimension (3D) Integrated Circuit (IC) technology, 3D Network-on-Chip (NoC) is becoming a promising architecture of high-performance System-on-Chip (SoC). To model 3D NoC and to evaluate the performance fast and accurately, the simulation method is therefore critical issue. Compared to software simulation, Field Programmable Gate Array (FPGA) based simulation can offer a high speed validation process with a higher accuracy. But there still exist some difficulties such as partition, scalability and so on. This paper proposed a novel multi-FPGA simulation platform, RcEF3Ns (Reconfigurable Simulation on multi-FPGA for 3D NoCs), based on Xilinx Virtex-6 FPGAs. The design method of RcEF3Ns employs a single FPGA to manage vertical transaction independently, supporting bus and network communication mechanism. All the parameters can be dynamically reconfigured on-chip to model 3D NoC architecture without re-synthesizing. The experiments show RcEF3Ns’ speedups over 10 times without sacrificing accuracy when compared to other hardware based platform.