Abstract
A state-of-the-art energy-efficient switching scheme for successive approximation register (SAR) analogue-to-digital converter (ADC) is proposed in this letter. With this proposed switching scheme, the average switching energy can be reduced by 98.8% compared to the conventional approach, and 75% of the chip area can be saved. While combining with an integer-based split-capacitor structure, both the average switching energy and chip area can be approximately reduced further by half. Yet, nonlinearity analysis and Monte Carlo simulation indicate that perfect linearity is still maintained.
