Abstract
A new method for extracting source/drain series resistances (Rsd) by combining split-CV and IV data of MOSFETs with multiple halo implant doses (called Multi-Dose Method) is proposed for the first time. This method eliminates the sensitivity of Rsd on effective channel length and considers halo-induced channel resistance increasing. Calibrated TCAD simulation and experimental data of 28-nm bulk MOSFETs with high-κ dielectric and metal gates are presented to support and validate the method. The maximum error of this method is within 5%, as compared with 63% for traditional methods. This method has been used as a monitor during technology optimization in foundry.
