An FPGA enhanced extensible and parallel query storage system for emerging NVRAM

Gezi Li; Xiaogang Chen; Bomy Chen; Shunfen Li; Mi Zhou; Wenbing Han; Xiaoyun Li; Zhitang Song

doi:10.1587/elex.13.20151109

LETTER

An FPGA enhanced extensible and parallel query storage system for emerging NVRAM

Gezi Li, Xiaogang Chen, Bomy Chen, Shunfen Li, Mi Zhou, Wenbing Han, Xiaoyun Li, Zhitang Song

Author information

Gezi Li
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
University of Chinese Academy of Sciences
Xiaogang Chen
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Bomy Chen
Shanghai Xinchu Integrated Circuit Incorporation
Shunfen Li
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Mi Zhou
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
University of Chinese Academy of Sciences
Wenbing Han
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
University of Chinese Academy of Sciences
Xiaoyun Li
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
University of Chinese Academy of Sciences
Zhitang Song
State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences

Keywords: storage, NVRAM, FPGA, parallel, query

JOURNAL FREE ACCESS

2016 Volume 13 Issue 4 Pages 20151109

DOI https://doi.org/10.1587/elex.13.20151109

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Abstract

Modern data appliances face severe bandwidth bottlenecks when transferring data between storage and host. In this paper, we present a storage system which can improve performance more than three times by using an FPGA to implement the off-load engine. Regardless of the data size, the host CPU utilization varies vastly between the two systems, traditional way uses 100% and the system presented only uses 1%. Compared to the traditional way, the memory allocation has been greatly reduced. The system presented is explored for emerging NVRAMs which have many benefits compared to the traditional memory.

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