IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
An efficient design for general mixed radix FFT processors
Cuimei MaHe ChenYijian LiuYanfei Wang
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2016 Volume 13 Issue 6 Pages 20160060

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Abstract

A general mixed-radix FFT design for in-place strategy is derived and a low-complexity scheme for efficiently implementing mixed-radix FFTs is proposed. In this method, we develop an accumulator that can simply and practically generate addresses for the operands, as well as the twiddle factors. This approach extends the range of FFT size and reduces the hardware complexity of any non-power-of-two memory-based FFTs. Finally, the 3780-point FFT is taken an example to illustrate the validation of the proposed method.

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© 2016 by The Institute of Electronics, Information and Communication Engineers
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