IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
A lightweight implementation of the Tav-128 hash function
Honorio MartinPedro Peris LopezEnrique San MillanJuan E. Tapiador
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JOURNALS FREE ACCESS

2017 Volume 14 Issue 11 Pages 20161255

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Abstract

In this article we discuss the hardware implementation of a lightweight hash function, named Tav-128 [1], which was purposely designed for constrained devices such as low-cost RFID tags. In the original paper, the authors only provide an estimation of the hardware complexity. Motivated for this, we describe both an ASIC and an FPGA-based implementation of the aforementioned cryptographic primitive, and examine the performance of three architectures optimizing different criteria: area, throughput, and a trade-off between both of them.

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© 2017 by The Institute of Electronics, Information and Communication Engineers
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