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IEICE Electronics Express
Vol. 14 (2017) No. 17 pp. 20160797




This letter presents a low-complexity semi-systolic array implementation for polynomial multiplication over GF(2m). We consider finite field Montgomery modular multiplication (MMM) based on two-level parallel computing approach to reduce the cell delay, latency, and area-time (AT) complexity. Compared to related multipliers, the proposed scheme yields significantly lower AT complexity.

Copyright © 2017 by The Institute of Electronics, Information and Communication Engineers

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