IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Standby power reduction using dynamic standby control with voltage keeper
Yingchieh HoChen Hsu
Author information
JOURNALS FREE ACCESS

2017 Volume 14 Issue 18 Pages 20170783

Details
Abstract

This paper presents dynamic standby control (DSC) with voltage keeper for further standby power reduction. As compared to the reported DSC, the new modified DSC can be kept deeply cut-off with negative overdrive voltage as well. Besides, a bootstrapped voltage keeper directly recharges the boosted node of power gate, which prevents leakage current during the recharging period. However, total standby power includes power overhead from DSC. Tuning the recharging rate of the proposed DSC appropriately achieves energy-efficient standby power. As a result, our proposal shows that minimized standby current can be found by an appropriate recharging rate even in different PVT conditions. The design is implemented in 180 nm CMOS process. Measured results show that standby power is suppressed at 0.8 V. Minimum standby power of only 16 nw is achieved where the recharging rate is 10 kHz.

Information related to the author
© 2017 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article
feedback
Top