IEICE Electronics Express
Online ISSN : 1349-2543
LETTER
Dynamic LLR scheme based on EM algorithm for LDPC decoding in NAND flash memory
Junli PengQi WangXiang FuZongliang Huo
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2017 Volume 14 Issue 18 Pages 20170820

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Abstract

A dynamic log-likelihood ratio (DLLR) scheme based on expectation-maximization (EM) algorithm for the decoding of low-density parity-check (LDPC) codes in NAND flash memory is proposed. When LDPC soft decoding fails, the DLLR scheme employs the EM algorithm to estimate the parameters of the threshold voltage distribution of NAND flash memory, and then recalculates the LLR values for decoding. Simulation results show that the proposed scheme can significantly improve the error correcting performance of LDPC soft decoding in NAND flash memory.

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© 2017 by The Institute of Electronics, Information and Communication Engineers
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