Accurate large-signal modeling using neuro-space mapping for power transistors

Abstract

In this paper, a novel neuro-space mapping (Neuro-SM) modeling approach for lager-signal transistors is proposed. A new structure of Neuro-SM model with capacitors and inductors is created to change the DC and AC characteristic of the model respectively. An additional current signal extracted with a novel nonlinear function is adopted to improve the large-signal characteristic of existing device models while remain the S-parameters unchanged. A step-by-step training method is developed for fast training of the proposed Neuro-SM model avoiding variables adjustment repeatedly. In addition, the modeling experiment for measurement data of LDMOS transistor demonstrate that the novel Neuro-SM method can accurately reflect the large-signal characteristics of transistor with simple operation process and enhance the accuracy of the existing model.