A CMOS QVCO using combined capacitor-coupling, bottom-series coupling and splitting switched biasing techniques

抄録

A quadrature voltage-controlled-oscillator (QVCO) is presented and fabricated in standard 0.18 µm RF CMOS technology. Passively Capacitor coupling, actively bottom-series (BS) coupling and splitting switching biasing (SSB) techniques are combined and employed for the QVCO to improve its phase noise performance without loss of the voltage headroom. Measured results show the proposed QVCO achieves a tuning range from 0.88 to 1.04 GHz, phase noise of −71.2 dBc/Hz@1 kHz and −113.1 dBc/Hz@1 MHz, and a phase-noise figure-of-merit (FOM_T) of 189.7 dBc/Hz from a offset frequency of 1 kHz, with an occupied die area of 1283 µm × 715 µm and power consumption of 11 mW from a 1.8 V voltage supply.