A CMOS QVCO using combined capacitor-coupling, bottom-series coupling and splitting switched biasing techniques

Changchun Zhang; Yingjian Wu; Chenghong Dong; Yi Zhang; Ying Zhang; Yufeng Guo

doi:10.1587/elex.15.20180861

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A CMOS QVCO using combined capacitor-coupling, bottom-series coupling and splitting switched biasing techniques

Changchun Zhang, Yingjian Wu, Chenghong Dong, Yi Zhang, Ying Zhang, Yufeng Guo

著者情報

キーワード: Quadrature VCO, splitting switched biasing, capacitor-coupling, bottom-series coupling, phase noise

ジャーナルフリー早期公開

論文ID: 15.20180861

DOI https://doi.org/10.1587/elex.15.20180861

この記事には本公開記事があります。

The final version of this article is now available: Vol. 15 (2018), No. 22 pp. 20180861-20180861

詳細

抄録

A quadrature voltage-controlled-oscillator (QVCO) is presented and fabricated in standard 0.18µm RF CMOS technology. Passively Capacitor coupling, actively bottom-series (BS) coupling and splitting switching biasing (SSB) techniques are combined and employed for the QVCO to improve its phase noise performance without loss of the voltage headroom. Measured results show the proposed QVCO achieves a tuning range from 0.88 to 1.04 GHz, phase noise of -71.2dBc/Hz@1kHz and -113.1dBc/Hz@1MHz, and a phase-noise figure-of-merit (FOM_T) of 189.7 dBc/Hz from a offset frequency of 1kHz , with an occupied die area of 1283µm×715µm and power consumption of 11mW from a 1.8V voltage supply.

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