2018 Volume 15 Issue 3 Pages 20171197
A low power hybrid PG_Filter-AGC analog baseband is presented, including a programmable filter (PG_filter) and an auto gain control core (AGC_core). It adopts the digital-plus-analog mixed gain control methodology, resulting in an effective power reduction and a decibel gain error improvement. To further reduce the power of the AGC_core, a low power Variable Gain Amplifier (VGA) adopting sub-threshold design methodology is presented. Furthermore, a self-adaptive threshold voltage compensation (SATC) scheme is proposed to guarantee the good anti-process variation performance for sub-threshold design methodology. The hybrid analog baseband has been fabricated under SMIC 0.18 µm CMOS process, with a die size of 0.45 mm2, where the AGC_core occupies an area of 0.28 mm2. The test results demonstrate a total power of 4.1 mW, where the AGC_core consumes a power of 0.39 mW. A consecutive gain dynamic range of 80 dB, with a decibel gain error small than ±0.39 dB, is achieved and the cutoff frequency ranges from 0.5 MHz∼30 MHz.