Design of low-loss 60 GHz integrated antenna switch in 65 nm CMOS

Abstract

A 60 GHz antenna switching architecture is presented for millimeter-wave transceivers. This circuit topology re-uses the last stage’s transistor of power amplifier (PA) and the first stage’s transistor of low-noise amplifier (LNA) as switches, and the matching blocks. A two-stage LNA and a two-stage PA are designed considering antenna switching operation in 65 nm CMOS. The method has lower loss than conventional switches in receiver mode. The most important advantage is no additional area penalty compared to conventional methods. 2.9 dB minimum noise figure (NF) in the receiver mode is measured, and 2 dBm of OP_1dB is measured in the transmitter mode.