A 6–18 GHz 6-bit active phase shifter in 0.13-µm SiGe BiCMOS

Abstract

A 6-bit digitally controlled active phase shifter is implemented in 0.13-µm SiGe BiCMOS process for 6–18 GHz phased-arrays. An input passive balun with center open stub is applied to split the single input to differential and achieve high amplitude/phase balance. A degenerated-Q quadrature all-pass filter (QAF) is used to generate two orthogonal vectors with high I/Q accuracy over a wide bandwidth and a main digital-to-analog convertor (DAC) controls the I/Q amplitude to achieve 6-bit phase resolution. In addition, a calibration DAC is adopted to compensate the amplitude variations and the phase error introduced by balun and QAF. Consequently, high resolution along with low gain/phase error can be achieved. The phase shifter has achieved root mean square (RMS) phase error of <4.36°, and RMS gain error of <1.04 dB for all 6-bit phase states at 6–18 GHz. The power gain ranges from 0.95 dB at 6 GHz to −1.85 dB at 18 GHz. Input 1 dB compression point (IP_−1dB) is 5.4–8 dBm at 6–18 GHz for 0°-phase state. The total power consumption is 74.4 mW, and the overall chip size is 1.8 × 1.3 mm².